void amd_iommu_set_dev_table_entry(u32 *dte, u64 root_ptr, u64 intremap_ptr,
u16 domain_id, u8 sys_mgt, u8 dev_ex,
- u8 paging_mode)
+ u8 paging_mode, u8 valid, u8 int_valid)
{
u64 addr_hi, addr_lo;
u32 entry;
set_field_in_reg_u32(0xB, entry,
IOMMU_DEV_TABLE_INT_TABLE_LENGTH_MASK,
IOMMU_DEV_TABLE_INT_TABLE_LENGTH_SHIFT, &entry);
- set_field_in_reg_u32(IOMMU_CONTROL_ENABLED, entry,
+ set_field_in_reg_u32(int_valid ? IOMMU_CONTROL_ENABLED :
+ IOMMU_CONTROL_DISABLED, entry,
IOMMU_DEV_TABLE_INT_VALID_MASK,
IOMMU_DEV_TABLE_INT_VALID_SHIFT, &entry);
set_field_in_reg_u32(IOMMU_CONTROL_ENABLED, entry,
set_field_in_reg_u32(IOMMU_CONTROL_ENABLED, entry,
IOMMU_DEV_TABLE_TRANSLATION_VALID_MASK,
IOMMU_DEV_TABLE_TRANSLATION_VALID_SHIFT, &entry);
- set_field_in_reg_u32(IOMMU_CONTROL_ENABLED, entry,
+ set_field_in_reg_u32(valid ? IOMMU_CONTROL_ENABLED :
+ IOMMU_CONTROL_DISABLED, entry,
IOMMU_DEV_TABLE_VALID_MASK,
IOMMU_DEV_TABLE_VALID_SHIFT, &entry);
dte[0] = entry;
void *dte;
unsigned long flags;
int req_id;
- u8 sys_mgt, dev_ex;
+ u8 sys_mgt, dev_ex, valid = 1, int_valid = 1;
struct hvm_iommu *hd = domain_hvm_iommu(domain);
BUG_ON( !hd->root_table || !hd->paging_mode || !int_remap_table );
sys_mgt = ivrs_mappings[req_id].dte_sys_mgt_enable;
dev_ex = ivrs_mappings[req_id].dte_allow_exclusion;
+ if ( iommu_passthrough && (domain->domain_id == 0) )
+ valid = 0;
+ if ( !iommu_intremap )
+ int_valid = 0;
+
amd_iommu_set_dev_table_entry((u32 *)dte,
page_to_maddr(hd->root_table),
virt_to_maddr(int_remap_table),
hd->domain_id, sys_mgt, dev_ex,
- hd->paging_mode);
+ hd->paging_mode, valid, int_valid);
invalidate_dev_table_entry(iommu, req_id);
invalidate_interrupt_table(iommu, req_id);
if ( domain->domain_id == 0 )
{
unsigned long i;
- /* setup 1:1 page table for dom0 */
- for ( i = 0; i < max_page; i++ )
- amd_iommu_map_page(domain, i, i);
+
+ if ( !iommu_passthrough )
+ {
+ /* setup 1:1 page table for dom0 */
+ for ( i = 0; i < max_page; i++ )
+ amd_iommu_map_page(domain, i, i);
+ }
amd_iommu_setup_dom0_devices(domain);
}
/* device table functions */
void amd_iommu_set_dev_table_entry(u32 *dte, u64 root_ptr, u64 intremap_ptr,
- u16 domain_id, u8 sys_mgt, u8 dev_ex, u8 paging_mode);
+ u16 domain_id, u8 sys_mgt, u8 dev_ex, u8 paging_mode,
+ u8 valid, u8 int_valid);
int amd_iommu_is_dte_page_translation_valid(u32 *entry);
void invalidate_dev_table_entry(struct amd_iommu *iommu, u16 devic_id);